As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to these users is an information handling system. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may vary with respect to the type of information handled; the methods for handling the information; the methods for processing, storing or communicating the information; the amount of information processed, stored, or communicated; and the speed and efficiency with which the information is processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include or comprise a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
An information handling system may include a serial interconnect to use differential, unidirectional, point-to-point signaling. With such signaling, a given signal line segment has only two transmit or receive connection points. A connection point at one end is provided with transmitter functionality, and a connection point at the other end is provided with receiver functionality. The data and address information for operations are typically embedded in packets. The unidirectional, differential, point-to-point interconnect approach is commonly used for variable packet length, single device to single device connections.
However, system memory topologies typically use single device to multiple devices connections—for example, a memory controller connected to multiple memory devices. To provide sufficient bandwidth, some memory topologies group multiple memory devices to respond to a single command and address to correspond to the bandwidth of the memory controller. Some memory devices such as dynamic random access memory (DRAM) interface to controllers using bus topologies and are optimized in such a way that implementing serial interfaces with the device can be difficult. For example, a native serial interface with multiple DRAMs would typically require a copy of the address information for each DRAM component. Memory controllers transmit data and address information for operations, but typically send one copy of the address information to multiple DRAM components. For a memory controller to operate in a fixed packet length serial point to point environment with multiple memory devices such as DRAM with native serial interfaces, the memory controller must send a copy of the address and control information for each DRAM component in order to maintain the point-to-point topology. This places a substantial burden on the memory controller.
To address such difficulties, approaches to serial interface topologies have been directed to multiplexing address information and write data on a single path. Other approaches have resorted to topologies that are not native serial interconnects, such as configurations that dispose all the memory devices in a parallel interface. However, multiplexing and using interconnects that are not point-to-point can require tradeoffs relating to one or more of speed, performance, efficiency, cost, complexity, device pin count, and scalability. Therefore, a need exists in the art for memory system architectures or memory topologies that address the difficulties of native point-to-point interfaces, while maintaining the unidirectional, differential and point-to-point topology.